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Written by Niels Moseley
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Retro Challenge 2024 #3

Introduction

Yesterday the top level model simulated with GHDL and it showed the right signs of life. Today I added a project for the official Gowin tools so I can get the system running on actual hardware.

Figure 1

The TEC0117 has a eight LEDS and an USB to serial converter in the from of an FTDI FT2232H chip, which are all connected to the FPGA. For serial communcation to work, the FPGA must use the TTL level serial protocol with one start bit, eight data bits and one stop bit to drive the FT2232H. On Linux the serial port will be available as /dev/ttyUSB1.

The code for the transmit UART and the baudrate generator are available on Github.

UART

The UART is a simple state machine. When it detects a write from the 68000, it stores the 8-bit data in the transmit buffer. The buffer is shifted out each time the baudrate generator supplies a baud_stb pulse.

Writes by the 68000 are ignored until the serial data has been completely sent. The UART has a ‘ready’ signal to expose when it is ready to accept new data from the 68000 but it is currently not connected. In addition, the clear-to-send (CTS) signal from the FT2232H is also ignored, so overruns are possible. Both of these bugs features need to be fixed later.

The transmit buffer is wider than eight bits so it can store the start, stop and idle state too. This simplifies the design.

Later on in the project, the baudrate generator can be shared between UARTs to reduce the gate count. For now there is just one transmit UART and no way to receive.

The transmit UART uses a fixed baudrate of 115200 symbols per second.

Address space

With the inclusion of the UART, there are now two devices using the data base: the RAM and the UART. Therefore we need to have a memory map. As the TEC0117 board has 8 megabytes of RAM and other boards might potentially have more, I put the UART at address 0x01XXXXXX and the RAM is at 0x00XXXXXX.

68000 programming tools

To facilitate splitting binary files into an upper and lower RAM block, I wrote a small C++ program called splitbin. It takes the binary output of asmx and generates hex text files that can be included in the BlockRAM vhdl code.

This is currently the only way to get code running on the GW68000 system.

Boot code

The UART is controlled by a new boot program:

; write ASCII 'A' to the UART continually
.org $0000

    dl $00000200
    dl $00000008

start:
    move.l #$01000000, A0   ; uart write address
    move.b #65, (A0)        ; write ASCII 'A' to uart tx data register
    jmp start

It’s a bit of a hack because it writes to the UART without any delay so many of the writes are ignored by the UART.

Conclusion

It works!

Figure 2